1. Field of Invention
The present relates to the p-type layers in III-nitride light emitting devices.
2. Description of Related Art
Semiconductor light-emitting devices including light emitting diodes (LEDs), resonant cavity light emitting diodes (RCLEDs), vertical cavity laser diodes (VCSELs), and edge emitting lasers are among the most efficient light sources currently available. Materials systems currently of interest in the manufacture of high-brightness light emitting devices capable of operation across the visible spectrum include Group III-V semiconductors, particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as III-nitride materials. Typically, III-nitride light emitting devices are fabricated by epitaxially growing a stack of semiconductor layers of different compositions and dopant concentrations on a sapphire, silicon carbide, III-nitride, or other suitable substrate by metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques. The stack often includes one or more n-type layers doped with, for example, Si, formed over the substrate, a light emitting or active region formed over the n-type layer or layers, and one or more p-type layers doped with, for example, Mg, formed over the active region. III-nitride devices formed on conductive substrates may have the p- and n-contacts formed on opposite sides of the device. Often, III-nitride devices are fabricated on insulating substrates, such as sapphire, with both contacts on the same side of the device.
FIG. 1 illustrates a conventional III-nitride LED grown on an insulating substrate. The device of FIG. 1 includes a GaN or AlN buffer layer 31, an n-type GaN layer 32, an InGaN active layer 33, a p-type AlGaN layer 34, and a p-type GaN layer 35 which are stacked sequentially on the top face of a sapphire substrate 30. A portion of layers 33, 34, and 35 is removed by etching to expose a portion of n-type GaN layer 32, then an n-side electrode 6 is formed on the exposed portion of n-type GaN layer 32. A p-side electrode 5 is formed on the top face of remaining p-type GaN layer 35.
After growth of n-type layer 32, the growth temperature is reduced in order to grow active layer 33. The growth temperature influences the incorporation of InN into active layer 33. In general, the lower the growth temperature, the more indium is incorporated into a layer, thus low growth temperatures are required to incorporate indium at the desired level. After growing active layer 33 at reduced temperature, the temperature is increased in order to grow p-type AlGaN layer 34 and p-type GaN layer 35.